I am a Software Engineer at Amazon's AWS / Annapurna Labs working on compilers for cloud-scale machine learning acceleration. We are hiring in Austin, Cupertino, and Seattle – please get in touch if you're interested in working in this cutting edge field!

Previously, I was a Staff Engineer in the Hexagon DSP compiler team at Qualcomm Innovation Center in Austin, Texas. I led their efforts on ThinLTO, compilation for Qualcomm's WLAN devices, as well as various code size optimizations.  A particular focus of my work was the development of support for linker scripts with (Thin)LTO, a novel feature that spans the full spectrum between compiler and linker.

Before moving to Austin, I was a researcher and PhD student in the Compiler and Architecture Design Group, Institute for Computing Systems Architecture at the University of Edinburgh's School of Informatics. My research focused on compiler engineering for parallel architectures. This included topics such as automatic parallelization; code size reduction and compact code generation for embedded architectures; instruction set simulation; and trace-based just-in-time compilation. See my publications for more details.

I hold a Ph.D. in Informatics (Computer Science) from the University of Edinburgh. The title of my thesis was "Automated Detection of Structured Coarse-Grained Parallelism in Sequential Legacy Applications" and my advisor was Björn Franke. My research was funded by a SICSA Prize Studentship and The Principal's Career Development Scholarship. I was awarded an Intel Doctoral Student Honor Programme fellowship in 2013 and a HiPEAC Paper Award in 2011. I have served as a reviewer for a number of international conferences and was General Chair of the 4th EuroLLVM Conference in 2014.

My wife runs Purse & Cook, an online store offering beautiful European baby and children's clothes.